Monolithic circuits such as are used in power amplifiers sometimes require NPN and PNP bipolar transistors. The transistors of monolithic integrated circuits are usually fabricated in N-type epitaxial (epi) silicon located on a P-type silicon substrate. Vertical NPN trasistors can be readily fabricated by using a P-type base diffusion into the N-type epi and an N-type emitter diffusion into the P-type base. The N-type epi provides the collector electrode of such NPN transistors. The substrate is not used in NPN transistor structures other than for isolation functions. A P+ isolation diffusion generally surrounds each of the NPN transistors and provides isolation.
PNP transistors, which are more difficult to fabricate in the N-type epi, usually have either lateral or vertical structures. Vertical, substrate PNP transistors include collector electrodes formed of the P-type substrate material and base electrodes formed of the N-type epi. The P diffusion, which forms the base electrodes of NPN transistors, provides the emitter electrodes of the substrate PNPs. Hence, the collector material of the NPNs forms the base of the substrate PNPs and the base diffusion for the NPN forms the emitter electrode of substrate PNPs. Since the collector of a substrate PNP is the substrate itself, the collector cannot be loaded and must be connected to the negative supply. Hence, such transistors can only be used in an "emitter-follower-mode."
Substrate Darlingtons include a driver transistor and an output transistor. The driver transistor has an emitter electrode connected to the base electrode of the output transistor and a collector electrode connected to the negative supply conductor. The base electrode of the driver transistor is connected to the Darlington input or driving terminal. The emitter electrode of the output transistor is connected to the output terminal of the Darlington and the collector electrode of the output transistor is connected to the negative supply conductor.
The common emitter current-gain-bandwidth product (f.sub..tau.) of substrate PNP monolithic integrated circuit transistors is typically low, for instance, on the order of from 3 to 30 megacycles. Consequently, problems occur when attempts are made to use these transistors in Darlington configurations for conducting large currents through load impedances having capacitive reactances. If a purely capacitive load is connected to the output terminal of a substrate PNP Darlington follower, the reactance of the capacitive load tends to be transformed into a negative resistance at the input terminal of the Darlington. This negative resistance apparently tends to cause oscillation.
Moreover, if a load resistance is added in parallel with the load capacitance, then the impedance looking into the input terminal of the Darlington substrate PNP transistors is changed from a negative resistance to an inductive reactance. This inductance in combination with stray circuit capacitance at the input terminal of the Darlington, which could be provided by the collectors, apparently creates a resonant circuit. Positive feedback through the resonant circuit also apparently results in undesirable oscillation.
One prior art solution for reducing the instability problem is to increase the base resistance or the output substrate Darlington PNP. This can be accomplished by utilizing a resistor to connect the emitter electrode of the driver transistor to the base electrode of the output transistor. This resistor must have a large value such as on the order of 10 kilo-ohms. The base current of the output transistor must flow through this large resistor. Since the beta of a PNP substrate transistor is relatively low, for instance 20, the PNP substrate output transistor requires high magnitude base currents to facilitate high magnitude load currents. Such base currents develop large voltage drops across the base resistor. Consequently, the load voltage cannot be driven to the negative supply potential because of the potential drop developed across the base resistor, which is in series with the load.
Another solution to the instability problem requires that a capacitor be connected between the input terminal of the Darlington and the ground or low level supply conductor. If this capacitor has a large value, on the order of 300 picofarads (pf), its reactance apparently swamps out the undesired impedance reflected from the load to the input terminal of the Darlington. The disadvantage of this technique is the fact that the capacitor takes up a large amount of die area, if provided on the chip. Integrated circuit capacitors have capacitances of about 0.1 picofarad per square mil (thousandth of an inch). Hence, a 300 picofarad capacitor requires about 3,000 square mils of die area, which is an undesirably large amount of die area. If the capacitor is located off of the chip then package leads are required to make connection thereto. Hence, external capacitors either increase the cost of the integrated circuit by requiring it to have additional leads or limit the electrical functions it can perform by using leads required for such functions. Moreover, to increase marketability, it is desirable to reduce the number of external components required for use with integrated circuits.